codekingpro/portable-devtools
114k
1#ifndef NVPERF_TARGET_H
2#define NVPERF_TARGET_H
3
4/*
5 * Copyright 2014-2023 NVIDIA Corporation. All rights reserved.
6 *
7 * NOTICE TO USER:
8 *
9 * This source code is subject to NVIDIA ownership rights under U.S. and
10 * international Copyright laws.
11 *
12 * This software and the information contained herein is PROPRIETARY and
13 * CONFIDENTIAL to NVIDIA and is being provided under the terms and conditions
14 * of a form of NVIDIA software license agreement.
15 *
16 * NVIDIA MAKES NO REPRESENTATION ABOUT THE SUITABILITY OF THIS SOURCE
17 * CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" WITHOUT EXPRESS OR
18 * IMPLIED WARRANTY OF ANY KIND. NVIDIA DISCLAIMS ALL WARRANTIES WITH
19 * REGARD TO THIS SOURCE CODE, INCLUDING ALL IMPLIED WARRANTIES OF
20 * MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE.
21 * IN NO EVENT SHALL NVIDIA BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
23 * OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
24 * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE
25 * OR PERFORMANCE OF THIS SOURCE CODE.
26 *
27 * U.S. Government End Users. This source code is a "commercial item" as
28 * that term is defined at 48 C.F.R. 2.101 (OCT 1995), consisting of
29 * "commercial computer software" and "commercial computer software
30 * documentation" as such terms are used in 48 C.F.R. 12.212 (SEPT 1995)
31 * and is provided to the U.S. Government only as a commercial end item.
32 * Consistent with 48 C.F.R.12.212 and 48 C.F.R. 227.7202-1 through
33 * 227.7202-4 (JUNE 1995), all U.S. Government End Users acquire the
34 * source code with only those rights set forth herein.
35 *
36 * Any use of this source code in individual and commercial software must
37 * include, in the user documentation and internal comments to the code,
38 * the above Disclaimer and U.S. Government End Users Notice.
39 */
40
41#include <stddef.h>
42#include <stdint.h>
43#include "nvperf_common.h"
44
45#if defined(__GNUC__) && defined(NVPA_SHARED_LIB)
46 #pragma GCC visibility push(default)
47 #if !defined(NVPW_LOCAL)
48 #define NVPW_LOCAL __attribute__ ((visibility ("hidden")))
49 #endif
50#else
51 #if !defined(NVPW_LOCAL)
52 #define NVPW_LOCAL
53 #endif
54#endif
55
56#ifdef __cplusplus
57extern "C" {
58#endif
59
60/**
61 * @file nvperf_target.h
62 */
63
64#ifndef NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_DEFINED
65#define NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_DEFINED
66 /// GPU architecture support level
67 typedef enum NVPW_GpuArchitectureSupportLevel
68 {
69 NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_UNKNOWN = 0,
70 NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_UNSUPPORTED,
71 NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_SUPPORTED
72 } NVPW_GpuArchitectureSupportLevel;
73#endif //NVPW_GPU_ARCHITECTURE_SUPPORT_LEVEL_DEFINED
74
75#ifndef NVPW_SLI_SUPPORT_LEVEL_DEFINED
76#define NVPW_SLI_SUPPORT_LEVEL_DEFINED
77 /// SLI configuration support level
78 typedef enum NVPW_SliSupportLevel
79 {
80 NVPW_SLI_SUPPORT_LEVEL_UNKNOWN = 0,
81 NVPW_SLI_SUPPORT_LEVEL_UNSUPPORTED,
82 /// Only Non-SLI configurations are supported.
83 NVPW_SLI_SUPPORT_LEVEL_SUPPORTED_NON_SLI_CONFIGURATION
84 } NVPW_SliSupportLevel;
85#endif //NVPW_SLI_SUPPORT_LEVEL_DEFINED
86
87#ifndef NVPW_VGPU_SUPPORT_LEVEL_DEFINED
88#define NVPW_VGPU_SUPPORT_LEVEL_DEFINED
89 /// Virtualized GPU configuration support level
90 typedef enum NVPW_VGpuSupportLevel
91 {
92 NVPW_VGPU_SUPPORT_LEVEL_UNKNOWN = 0,
93 NVPW_VGPU_SUPPORT_LEVEL_UNSUPPORTED,
94 /// Supported but not allowed by system admin.
95 NVPW_VGPU_SUPPORT_LEVEL_SUPPORTED_DISALLOWED,
96 NVPW_VGPU_SUPPORT_LEVEL_SUPPORTED_ALLOWED,
97 NVPW_VGPU_SUPPORT_LEVEL_SUPPORTED_NON_VGPU_CONFIGURATION
98 } NVPW_VGpuSupportLevel;
99#endif //NVPW_VGPU_SUPPORT_LEVEL_DEFINED
100
101#ifndef NVPW_CONF_COMPUTE_SUPPORT_LEVEL_DEFINED
102#define NVPW_CONF_COMPUTE_SUPPORT_LEVEL_DEFINED
103 /// Confidential Compute mode support level
104 typedef enum NVPW_ConfidentialComputeSupportLevel
105 {
106 NVPW_CONF_COMPUTE_SUPPORT_LEVEL_UNKNOWN = 0,
107 NVPW_CONF_COMPUTE_SUPPORT_LEVEL_UNSUPPORTED,
108 NVPW_CONF_COMPUTE_SUPPORT_LEVEL_SUPPORTED_NON_CONF_COMPUTE_CONFIGURATION,
109 NVPW_CONF_COMPUTE_SUPPORT_LEVEL_SUPPORTED_CONF_COMPUTE_DEVTOOLS_MODE
110 } NVPW_ConfidentialComputeSupportLevel;
111#endif //NVPW_CONF_COMPUTE_SUPPORT_LEVEL_DEFINED
112
113#ifndef NVPW_CMP_SUPPORT_LEVEL_DEFINED
114#define NVPW_CMP_SUPPORT_LEVEL_DEFINED
115 /// CMP support level
116 typedef enum NVPW_CmpSupportLevel
117 {
118 NVPW_CMP_SUPPORT_LEVEL_UNKNOWN = 0,
119 NVPW_CMP_SUPPORT_LEVEL_UNSUPPORTED,
120 NVPW_CMP_SUPPORT_LEVEL_SUPPORTED_NON_CMP_CONFIGURATON
121 } NVPW_CmpSupportLevel;
122#endif //NVPW_CMP_SUPPORT_LEVEL_DEFINED
123
124#ifndef NVPW_WSL_SUPPORT_LEVEL_DEFINED
125#define NVPW_WSL_SUPPORT_LEVEL_DEFINED
126 /// WSL support level
127 typedef enum NVPW_WslSupportLevel
128 {
129 NVPW_WSL_SUPPORT_LEVEL_UNKNOWN = 0,
130 NVPW_WSL_SUPPORT_LEVEL_UNSUPPORTED_INSUFFICIENT_DRIVER_VERSION,
131 NVPW_WSL_SUPPORT_LEVEL_SUPPORTED,
132 NVPW_WSL_SUPPORT_LEVEL_SUPPORTED_NON_WSL_CONFIGURATION
133 } NVPW_WslSupportLevel;
134#endif //NVPW_WSL_SUPPORT_LEVEL_DEFINED
135
136 typedef struct NVPW_InitializeTarget_Params
137 {
138 /// [in]
139 size_t structSize;
140 /// [in] assign to NULL
141 void* pPriv;
142 } NVPW_InitializeTarget_Params;
143#define NVPW_InitializeTarget_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_InitializeTarget_Params, pPriv)
144
145 /// Load the target library.
146 NVPA_Status NVPW_InitializeTarget(NVPW_InitializeTarget_Params* pParams);
147
148 typedef struct NVPW_GetDeviceCount_Params
149 {
150 /// [in]
151 size_t structSize;
152 /// [in] assign to NULL
153 void* pPriv;
154 size_t numDevices;
155 } NVPW_GetDeviceCount_Params;
156#define NVPW_GetDeviceCount_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_GetDeviceCount_Params, numDevices)
157
158 NVPA_Status NVPW_GetDeviceCount(NVPW_GetDeviceCount_Params* pParams);
159
160 typedef struct NVPW_Device_GetNames_Params
161 {
162 /// [in]
163 size_t structSize;
164 /// [in] assign to NULL
165 void* pPriv;
166 size_t deviceIndex;
167 const char* pDeviceName;
168 const char* pChipName;
169 } NVPW_Device_GetNames_Params;
170#define NVPW_Device_GetNames_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetNames_Params, pChipName)
171
172 NVPA_Status NVPW_Device_GetNames(NVPW_Device_GetNames_Params* pParams);
173
174 typedef struct NVPW_PciBusId
175 {
176 /// The PCI domain on which the device bus resides.
177 uint32_t domain;
178 /// The bus on which the device resides.
179 uint16_t bus;
180 /// device ID.
181 uint16_t device;
182 } NVPW_PciBusId;
183#define NVPW_PciBusId_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PciBusId, device)
184
185 typedef struct NVPW_Device_GetPciBusIds_Params
186 {
187 /// [in]
188 size_t structSize;
189 /// [in] assign to NULL
190 void* pPriv;
191 /// [in] caller-allocated array of NVPW_PciBusId, indexed by NVPW deviceIndex
192 NVPW_PciBusId* pBusIds;
193 /// [in] size of the pBusIDs array; use result from NVPW_GetDeviceCount
194 size_t numDevices;
195 } NVPW_Device_GetPciBusIds_Params;
196#define NVPW_Device_GetPciBusIds_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetPciBusIds_Params, numDevices)
197
198 NVPA_Status NVPW_Device_GetPciBusIds(NVPW_Device_GetPciBusIds_Params* pParams);
199
200
201#define NVPW_DEVICE_MIG_GPU_INSTANCE_ID_INVALID 0xFFFFFFFFu
202#define NVPW_DEVICE_MIG_GPU_INSTANCE_ID_FULLCHIP 0xFFFFFFFEu
203
204
205 typedef struct NVPW_Device_GetMigAttributes_Params
206 {
207 /// [in]
208 size_t structSize;
209 /// [in] assign to NULL
210 void* pPriv;
211 /// [in]
212 size_t deviceIndex;
213 /// [out]
214 NVPA_Bool isMigPartition;
215 /// [out]
216 uint32_t gpuInstanceId;
217 /// [out]
218 uint32_t computeInstanceId;
219 } NVPW_Device_GetMigAttributes_Params;
220#define NVPW_Device_GetMigAttributes_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetMigAttributes_Params, computeInstanceId)
221
222 NVPA_Status NVPW_Device_GetMigAttributes(NVPW_Device_GetMigAttributes_Params* pParams);
223
224 typedef struct NVPW_Adapter_GetDeviceIndex_Params
225 {
226 /// [in]
227 size_t structSize;
228 /// [in] assign to NULL
229 void* pPriv;
230 /// [in]
231 struct IDXGIAdapter* pAdapter;
232 /// [in]
233 size_t sliIndex;
234 /// [out]
235 size_t deviceIndex;
236 } NVPW_Adapter_GetDeviceIndex_Params;
237#define NVPW_Adapter_GetDeviceIndex_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Adapter_GetDeviceIndex_Params, deviceIndex)
238
239 NVPA_Status NVPW_Adapter_GetDeviceIndex(NVPW_Adapter_GetDeviceIndex_Params* pParams);
240
241 typedef struct NVPW_CounterData_GetNumRanges_Params
242 {
243 /// [in]
244 size_t structSize;
245 /// [in] assign to NULL
246 void* pPriv;
247 const uint8_t* pCounterDataImage;
248 size_t numRanges;
249 } NVPW_CounterData_GetNumRanges_Params;
250#define NVPW_CounterData_GetNumRanges_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_GetNumRanges_Params, numRanges)
251
252 NVPA_Status NVPW_CounterData_GetNumRanges(NVPW_CounterData_GetNumRanges_Params* pParams);
253
254 typedef struct NVPW_CounterData_GetChipName_Params
255 {
256 /// [in]
257 size_t structSize;
258 /// [in] assign to NULL
259 void* pPriv;
260 /// [in]
261 const uint8_t* pCounterDataImage;
262 /// [in]
263 size_t counterDataImageSize;
264 /// [out]
265 const char* pChipName;
266 } NVPW_CounterData_GetChipName_Params;
267#define NVPW_CounterData_GetChipName_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_GetChipName_Params, pChipName)
268
269 NVPA_Status NVPW_CounterData_GetChipName(NVPW_CounterData_GetChipName_Params* pParams);
270
271 typedef struct NVPW_Config_GetNumPasses_Params
272 {
273 /// [in]
274 size_t structSize;
275 /// [in] assign to NULL
276 void* pPriv;
277 /// [in]
278 const uint8_t* pConfig;
279 /// [out]
280 size_t numPipelinedPasses;
281 /// [out]
282 size_t numIsolatedPasses;
283 } NVPW_Config_GetNumPasses_Params;
284#define NVPW_Config_GetNumPasses_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Config_GetNumPasses_Params, numIsolatedPasses)
285
286 /// Total num passes = numPipelinedPasses + numIsolatedPasses * numNestingLevels
287 NVPA_Status NVPW_Config_GetNumPasses(NVPW_Config_GetNumPasses_Params* pParams);
288
289 typedef struct NVPW_Config_GetNumPasses_V2_Params
290 {
291 /// [in]
292 size_t structSize;
293 /// [in] assign to NULL
294 void* pPriv;
295 /// [in]
296 const uint8_t* pConfig;
297 /// [out]
298 size_t numPasses;
299 } NVPW_Config_GetNumPasses_V2_Params;
300#define NVPW_Config_GetNumPasses_V2_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Config_GetNumPasses_V2_Params, numPasses)
301
302 /// Total num passes = numPasses * numNestingLevels
303 NVPA_Status NVPW_Config_GetNumPasses_V2(NVPW_Config_GetNumPasses_V2_Params* pParams);
304
305#define NVPW_API_SET_CUDA_PROFILER 0x18209d0775b2f89dULL
306
307#define NVPW_API_SET_D3D11_PROFILER 0xca55c6738445db2bULL
308
309#define NVPW_API_SET_D3D12_PROFILER 0xc0c2d46dd7c7ad78ULL
310
311#define NVPW_API_SET_EGL_PROFILER 0x3c3747dae1f9565cULL
312
313#define NVPW_API_SET_GPU_PERIODICSAMPLER 0x9f4c2571fc0b2e8aULL
314
315#define NVPW_API_SET_METRICSCONTEXT 0x7c8579f6f2144beaULL
316
317#define NVPW_API_SET_METRICSEVALUATOR 0x0368a8768d811af9ULL
318
319#define NVPW_API_SET_METRICS_AD10X_COMP 0xbe57278e12cb5288ULL
320
321#define NVPW_API_SET_METRICS_AD10X_GRFX 0x5cbf0774f81bf491ULL
322
323#define NVPW_API_SET_METRICS_GA100_COMP 0x16b7d8c20d8b4915ULL
324
325#define NVPW_API_SET_METRICS_GA100_GRFX 0xc94eaabec04a94faULL
326
327#define NVPW_API_SET_METRICS_GA10X_COMP 0xb5d6391c2e299ab5ULL
328
329#define NVPW_API_SET_METRICS_GA10X_GRFX 0x6ebc121178b5ce0bULL
330
331#define NVPW_API_SET_METRICS_GV100_COMP 0x863705cc57919f72ULL
332
333#define NVPW_API_SET_METRICS_GV100_GRFX 0x9900da75d164fecfULL
334
335#define NVPW_API_SET_METRICS_GV11B_COMP 0xd3f79a859235848fULL
336
337#define NVPW_API_SET_METRICS_GV11B_GRFX 0xeb8e26220106e227ULL
338
339#define NVPW_API_SET_METRICS_TU10X_COMP 0x70f40be0afd35da8ULL
340
341#define NVPW_API_SET_METRICS_TU10X_GRFX 0xdf219cb838db6968ULL
342
343#define NVPW_API_SET_METRICS_TU11X_COMP 0xeb0069d7d0956678ULL
344
345#define NVPW_API_SET_METRICS_TU11X_GRFX 0x0977d9342bd62743ULL
346
347#define NVPW_API_SET_OPENGL_PROFILER 0xe4cd9ea40f2ee777ULL
348
349#define NVPW_API_SET_VULKAN_PROFILER 0x8c56b6a03d779689ULL
350
351#define NVPW_SDK_VERSION 0x1e128b6f001423fcULL
352
353 typedef struct NVPW_QueryVersionNumber_Params
354 {
355 /// [in]
356 size_t structSize;
357 /// [in] assign to NULL
358 void* pPriv;
359 /// [in]
360 uint64_t apiSet;
361 /// [out]
362 uint32_t major;
363 /// [out]
364 uint32_t minor;
365 /// [out]
366 uint32_t patch;
367 /// [out]
368 uint32_t relMajor;
369 /// [out]
370 uint32_t relMinor;
371 /// [out]
372 uint32_t relPatch;
373 } NVPW_QueryVersionNumber_Params;
374#define NVPW_QueryVersionNumber_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_QueryVersionNumber_Params, relPatch)
375
376 /// Query version number of an API set
377 NVPA_Status NVPW_QueryVersionNumber(NVPW_QueryVersionNumber_Params* pParams);
378
379 typedef enum NVPW_Device_ClockStatus
380 {
381 /// clock status is unknown
382 NVPW_DEVICE_CLOCK_STATUS_UNKNOWN,
383 /// clocks are locked to rated tdp values
384 NVPW_DEVICE_CLOCK_STATUS_LOCKED_TO_RATED_TDP,
385 /// clocks are not locked and can boost above rated tdp
386 NVPW_DEVICE_CLOCK_STATUS_BOOST_ENABLED,
387 /// clocks are not locked and will not go above rated tdp
388 NVPW_DEVICE_CLOCK_STATUS_BOOST_DISABLED,
389 NVPW_DEVICE_CLOCK_STATUS__COUNT
390 } NVPW_Device_ClockStatus;
391
392 typedef struct NVPW_Device_GetClockStatus_Params
393 {
394 /// [in]
395 size_t structSize;
396 /// [in] assign to NULL
397 void* pPriv;
398 size_t deviceIndex;
399 /// [in]
400 NVPW_Device_ClockStatus clockStatus;
401 } NVPW_Device_GetClockStatus_Params;
402#define NVPW_Device_GetClockStatus_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_GetClockStatus_Params, clockStatus)
403
404 NVPA_Status NVPW_Device_GetClockStatus(NVPW_Device_GetClockStatus_Params* pParams);
405
406 typedef enum NVPW_Device_ClockSetting
407 {
408 /// invalid op, specify valid clocks operation during profiling
409 NVPW_DEVICE_CLOCK_SETTING_INVALID,
410 /// default to driver/application config (normally unlocked and not boosted, but could be unlocked boosted, or
411 /// locked to rated TDP)
412 NVPW_DEVICE_CLOCK_SETTING_DEFAULT,
413 /// lock clocks at rated tdp base values
414 NVPW_DEVICE_CLOCK_SETTING_LOCK_TO_RATED_TDP,
415 NVPW_DEVICE_CLOCK_SETTING__COUNT
416 } NVPW_Device_ClockSetting;
417
418 typedef struct NVPW_Device_SetClockSetting_Params
419 {
420 /// [in]
421 size_t structSize;
422 /// [in] assign to NULL
423 void* pPriv;
424 size_t deviceIndex;
425 /// [in]
426 NVPW_Device_ClockSetting clockSetting;
427 } NVPW_Device_SetClockSetting_Params;
428#define NVPW_Device_SetClockSetting_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Device_SetClockSetting_Params, clockSetting)
429
430 NVPA_Status NVPW_Device_SetClockSetting(NVPW_Device_SetClockSetting_Params* pParams);
431
432 typedef struct NVPW_CounterData_GetRangeDescriptions_Params
433 {
434 /// [in]
435 size_t structSize;
436 /// [in] assign to NULL
437 void* pPriv;
438 const uint8_t* pCounterDataImage;
439 size_t rangeIndex;
440 /// [inout] Number of descriptions allocated in ppDescriptions
441 size_t numDescriptions;
442 const char** ppDescriptions;
443 } NVPW_CounterData_GetRangeDescriptions_Params;
444#define NVPW_CounterData_GetRangeDescriptions_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_CounterData_GetRangeDescriptions_Params, ppDescriptions)
445
446 NVPA_Status NVPW_CounterData_GetRangeDescriptions(NVPW_CounterData_GetRangeDescriptions_Params* pParams);
447
448 typedef struct NVPW_Profiler_CounterData_GetRangeDescriptions_Params
449 {
450 /// [in]
451 size_t structSize;
452 /// [in] assign to NULL
453 void* pPriv;
454 const uint8_t* pCounterDataImage;
455 size_t rangeIndex;
456 /// [inout] Number of descriptions allocated in ppDescriptions
457 size_t numDescriptions;
458 const char** ppDescriptions;
459 } NVPW_Profiler_CounterData_GetRangeDescriptions_Params;
460#define NVPW_Profiler_CounterData_GetRangeDescriptions_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_Profiler_CounterData_GetRangeDescriptions_Params, ppDescriptions)
461
462 NVPA_Status NVPW_Profiler_CounterData_GetRangeDescriptions(NVPW_Profiler_CounterData_GetRangeDescriptions_Params* pParams);
463
464#ifndef NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_DEFINED
465#define NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_DEFINED
466 typedef enum NVPW_PeriodicSampler_CounterData_AppendMode
467 {
468 NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_LINEAR = 0,
469 NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_CIRCULAR = 1,
470 NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE__COUNT
471 } NVPW_PeriodicSampler_CounterData_AppendMode;
472#endif //NVPW_PERIODIC_SAMPLER_COUNTER_DATA_APPEND_MODE_DEFINED
473
474 typedef struct NVPW_PeriodicSampler_CounterData_GetSampleTime_Params
475 {
476 /// [in]
477 size_t structSize;
478 /// [in] assign to NULL
479 void* pPriv;
480 /// [in]
481 const uint8_t* pCounterDataImage;
482 /// [in]
483 size_t rangeIndex;
484 /// [out]
485 uint64_t timestampStart;
486 /// [out]
487 uint64_t timestampEnd;
488 } NVPW_PeriodicSampler_CounterData_GetSampleTime_Params;
489#define NVPW_PeriodicSampler_CounterData_GetSampleTime_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_GetSampleTime_Params, timestampEnd)
490
491 NVPA_Status NVPW_PeriodicSampler_CounterData_GetSampleTime(NVPW_PeriodicSampler_CounterData_GetSampleTime_Params* pParams);
492
493 typedef struct NVPW_PeriodicSampler_CounterData_TrimInPlace_Params
494 {
495 /// [in]
496 size_t structSize;
497 /// [in] assign to NULL
498 void* pPriv;
499 /// [in]
500 uint8_t* pCounterDataImage;
501 /// [in]
502 size_t counterDataImageSize;
503 /// [out]
504 size_t counterDataImageTrimmedSize;
505 } NVPW_PeriodicSampler_CounterData_TrimInPlace_Params;
506#define NVPW_PeriodicSampler_CounterData_TrimInPlace_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_TrimInPlace_Params, counterDataImageTrimmedSize)
507
508 NVPA_Status NVPW_PeriodicSampler_CounterData_TrimInPlace(NVPW_PeriodicSampler_CounterData_TrimInPlace_Params* pParams);
509
510 typedef struct NVPW_PeriodicSampler_CounterData_GetInfo_Params
511 {
512 /// [in]
513 size_t structSize;
514 /// [in] assign to NULL
515 void* pPriv;
516 /// [in]
517 const uint8_t* pCounterDataImage;
518 /// [in]
519 size_t counterDataImageSize;
520 /// [out] total number of ranges in the counter data
521 size_t numTotalRanges;
522 /// [out] if in "linear" mode, this API returns the number of "populated" ranges; if it's in "circular" mode,
523 /// then it returns the last "populated" range index + 1, when there is no such range, it returns 0.
524 size_t numPopulatedRanges;
525 /// [out] if in "linear" mode, this API returns the number of "completed" ranges; if it's in "circular" mode,
526 /// then it returns the last "completed" range index + 1, when there is no such range, it returns 0.
527 size_t numCompletedRanges;
528 } NVPW_PeriodicSampler_CounterData_GetInfo_Params;
529#define NVPW_PeriodicSampler_CounterData_GetInfo_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_GetInfo_Params, numCompletedRanges)
530
531 /// In periodic sampler, a range in counter data stores exactly one sample's data. For better performance, periodic
532 /// sampler may operate in an out-of-order fashion when populating sample data, i.e. it may not fully populate all
533 /// counters of a sample/range before starting to populate the next sample/range. As a result, we have two concepts
534 /// here, "populated" & "completed": a range is considered "populated" even if only partial counters have been
535 /// written; on the other hand, a range is only considered "completed" if all the collecting counters have been
536 /// written.
537 NVPA_Status NVPW_PeriodicSampler_CounterData_GetInfo(NVPW_PeriodicSampler_CounterData_GetInfo_Params* pParams);
538
539 typedef struct NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params
540 {
541 /// [in]
542 size_t structSize;
543 /// [in] assign to NULL
544 void* pPriv;
545 /// [in]
546 const uint8_t* pCounterDataImage;
547 /// [in]
548 size_t counterDataImageSize;
549 /// [in]
550 size_t rangeIndex;
551 /// [out]
552 uint32_t triggerCount;
553 } NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params;
554#define NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params, triggerCount)
555
556 NVPA_Status NVPW_PeriodicSampler_CounterData_GetTriggerCount(NVPW_PeriodicSampler_CounterData_GetTriggerCount_Params* pParams);
557
558 typedef struct NVPW_PeriodicSampler_CounterData_IsDataComplete_Params
559 {
560 /// [in]
561 size_t structSize;
562 /// [in] assign to NULL
563 void* pPriv;
564 /// [in]
565 const uint8_t* pCounterDataImage;
566 /// [in]
567 size_t counterDataImageSize;
568 /// [in]
569 size_t rangeIndex;
570 /// [out]
571 NVPA_Bool isComplete;
572 } NVPW_PeriodicSampler_CounterData_IsDataComplete_Params;
573#define NVPW_PeriodicSampler_CounterData_IsDataComplete_Params_STRUCT_SIZE NVPA_STRUCT_SIZE(NVPW_PeriodicSampler_CounterData_IsDataComplete_Params, isComplete)
574
575 /// Checks whether a given sample's data is complete. See also 'NVPW_PeriodicSampler_CounterData_GetInfo'
576 NVPA_Status NVPW_PeriodicSampler_CounterData_IsDataComplete(NVPW_PeriodicSampler_CounterData_IsDataComplete_Params* pParams);
577
578
579 typedef struct NVPW_TimestampReport
580 {
581 uint32_t payload;
582 uint8_t reserved0004[4];
583 uint64_t timestamp;
584 } NVPW_TimestampReport;
585
586
587
588
589#ifdef __cplusplus
590} // extern "C"
591#endif
592
593#if defined(__GNUC__) && defined(NVPA_SHARED_LIB)
594 #pragma GCC visibility pop
595#endif
596
597#endif // NVPERF_TARGET_H
598