codekingpro/portable-devtools
114k
1"""2 pygments.lexers.hdl3 ~~~~~~~~~~~~~~~~~~~4 5 Lexers for hardware descriptor languages.6 7 :copyright: Copyright 2006-2024 by the Pygments team, see AUTHORS.8 :license: BSD, see LICENSE for details.9"""10 11import re12 13from pygments.lexer import RegexLexer, bygroups, include, using, this, words14from pygments.token import Text, Comment, Operator, Keyword, Name, String, \15 Number, Punctuation, Whitespace16 17__all__ = ['VerilogLexer', 'SystemVerilogLexer', 'VhdlLexer']18 19 20class VerilogLexer(RegexLexer):21 """22 For verilog source code with preprocessor directives.23 """24 name = 'verilog'25 aliases = ['verilog', 'v']26 filenames = ['*.v']27 mimetypes = ['text/x-verilog']28 url = 'https://en.wikipedia.org/wiki/Verilog'29 version_added = '1.4'30 31 #: optional Comment or Whitespace32 _ws = r'(?:\s|//.*?\n|/[*].*?[*]/)+'33 34 tokens = {35 'root': [36 (r'^\s*`define', Comment.Preproc, 'macro'),37 (r'\s+', Whitespace),38 (r'(\\)(\n)', bygroups(String.Escape, Whitespace)), # line continuation39 (r'/(\\\n)?/(\n|(.|\n)*?[^\\]\n)', Comment.Single),40 (r'/(\\\n)?[*](.|\n)*?[*](\\\n)?/', Comment.Multiline),41 (r'[{}#@]', Punctuation),42 (r'L?"', String, 'string'),43 (r"L?'(\\.|\\[0-7]{1,3}|\\x[a-fA-F0-9]{1,2}|[^\\\'\n])'", String.Char),44 (r'(\d+\.\d*|\.\d+|\d+)[eE][+-]?\d+[lL]?', Number.Float),45 (r'(\d+\.\d*|\.\d+|\d+[fF])[fF]?', Number.Float),46 (r'([0-9]+)|(\'h)[0-9a-fA-F]+', Number.Hex),47 (r'([0-9]+)|(\'b)[01]+', Number.Bin),48 (r'([0-9]+)|(\'d)[0-9]+', Number.Integer),49 (r'([0-9]+)|(\'o)[0-7]+', Number.Oct),50 (r'\'[01xz]', Number),51 (r'\d+[Ll]?', Number.Integer),52 (r'[~!%^&*+=|?:<>/-]', Operator),53 (r'[()\[\],.;\']', Punctuation),54 (r'`[a-zA-Z_]\w*', Name.Constant),55 56 (r'^(\s*)(package)(\s+)', bygroups(Whitespace, Keyword.Namespace, Text)),57 (r'^(\s*)(import)(\s+)', bygroups(Whitespace, Keyword.Namespace, Text),58 'import'),59 60 (words((61 'always', 'always_comb', 'always_ff', 'always_latch', 'and',62 'assign', 'automatic', 'begin', 'break', 'buf', 'bufif0', 'bufif1',63 'case', 'casex', 'casez', 'cmos', 'const', 'continue', 'deassign',64 'default', 'defparam', 'disable', 'do', 'edge', 'else', 'end', 'endcase',65 'endfunction', 'endgenerate', 'endmodule', 'endpackage', 'endprimitive',66 'endspecify', 'endtable', 'endtask', 'enum', 'event', 'final', 'for',67 'force', 'forever', 'fork', 'function', 'generate', 'genvar', 'highz0',68 'highz1', 'if', 'initial', 'inout', 'input', 'integer', 'join', 'large',69 'localparam', 'macromodule', 'medium', 'module', 'nand', 'negedge',70 'nmos', 'nor', 'not', 'notif0', 'notif1', 'or', 'output', 'packed',71 'parameter', 'pmos', 'posedge', 'primitive', 'pull0', 'pull1',72 'pulldown', 'pullup', 'rcmos', 'ref', 'release', 'repeat', 'return',73 'rnmos', 'rpmos', 'rtran', 'rtranif0', 'rtranif1', 'scalared', 'signed',74 'small', 'specify', 'specparam', 'strength', 'string', 'strong0',75 'strong1', 'struct', 'table', 'task', 'tran', 'tranif0', 'tranif1',76 'type', 'typedef', 'unsigned', 'var', 'vectored', 'void', 'wait',77 'weak0', 'weak1', 'while', 'xnor', 'xor'), suffix=r'\b'),78 Keyword),79 80 (words((81 'accelerate', 'autoexpand_vectornets', 'celldefine', 'default_nettype',82 'else', 'elsif', 'endcelldefine', 'endif', 'endprotect', 'endprotected',83 'expand_vectornets', 'ifdef', 'ifndef', 'include', 'noaccelerate',84 'noexpand_vectornets', 'noremove_gatenames', 'noremove_netnames',85 'nounconnected_drive', 'protect', 'protected', 'remove_gatenames',86 'remove_netnames', 'resetall', 'timescale', 'unconnected_drive',87 'undef'), prefix=r'`', suffix=r'\b'),88 Comment.Preproc),89 90 (words((91 'bits', 'bitstoreal', 'bitstoshortreal', 'countdrivers', 'display', 'fclose',92 'fdisplay', 'finish', 'floor', 'fmonitor', 'fopen', 'fstrobe', 'fwrite',93 'getpattern', 'history', 'incsave', 'input', 'itor', 'key', 'list', 'log',94 'monitor', 'monitoroff', 'monitoron', 'nokey', 'nolog', 'printtimescale',95 'random', 'readmemb', 'readmemh', 'realtime', 'realtobits', 'reset',96 'reset_count', 'reset_value', 'restart', 'rtoi', 'save', 'scale', 'scope',97 'shortrealtobits', 'showscopes', 'showvariables', 'showvars', 'sreadmemb',98 'sreadmemh', 'stime', 'stop', 'strobe', 'time', 'timeformat', 'write'),99 prefix=r'\$', suffix=r'\b'),100 Name.Builtin),101 102 (words((103 'byte', 'shortint', 'int', 'longint', 'integer', 'time',104 'bit', 'logic', 'reg', 'supply0', 'supply1', 'tri', 'triand',105 'trior', 'tri0', 'tri1', 'trireg', 'uwire', 'wire', 'wand', 'wor'106 'shortreal', 'real', 'realtime'), suffix=r'\b'),107 Keyword.Type),108 (r'[a-zA-Z_]\w*:(?!:)', Name.Label),109 (r'\$?[a-zA-Z_]\w*', Name),110 (r'\\(\S+)', Name),111 ],112 'string': [113 (r'"', String, '#pop'),114 (r'\\([\\abfnrtv"\']|x[a-fA-F0-9]{2,4}|[0-7]{1,3})', String.Escape),115 (r'[^\\"\n]+', String), # all other characters116 (r'(\\)(\n)', bygroups(String.Escape, Whitespace)), # line continuation117 (r'\\', String), # stray backslash118 ],119 'macro': [120 (r'[^/\n]+', Comment.Preproc),121 (r'/[*](.|\n)*?[*]/', Comment.Multiline),122 (r'//.*?\n', Comment.Single, '#pop'),123 (r'/', Comment.Preproc),124 (r'(?<=\\)\n', Comment.Preproc),125 (r'\n', Whitespace, '#pop'),126 ],127 'import': [128 (r'[\w:]+\*?', Name.Namespace, '#pop')129 ]130 }131 132 def analyse_text(text):133 """Verilog code will use one of reg/wire/assign for sure, and that134 is not common elsewhere."""135 result = 0136 if 'reg' in text:137 result += 0.1138 if 'wire' in text:139 result += 0.1140 if 'assign' in text:141 result += 0.1142 143 return result144 145 146class SystemVerilogLexer(RegexLexer):147 """148 Extends verilog lexer to recognise all SystemVerilog keywords from IEEE149 1800-2009 standard.150 """151 name = 'systemverilog'152 aliases = ['systemverilog', 'sv']153 filenames = ['*.sv', '*.svh']154 mimetypes = ['text/x-systemverilog']155 url = 'https://en.wikipedia.org/wiki/SystemVerilog'156 version_added = '1.5'157 158 #: optional Comment or Whitespace159 _ws = r'(?:\s|//.*?\n|/[*].*?[*]/)+'160 161 tokens = {162 'root': [163 (r'^(\s*)(`define)', bygroups(Whitespace, Comment.Preproc), 'macro'),164 (r'^(\s*)(package)(\s+)', bygroups(Whitespace, Keyword.Namespace, Whitespace)),165 (r'^(\s*)(import)(\s+)', bygroups(Whitespace, Keyword.Namespace, Whitespace), 'import'),166 167 (r'\s+', Whitespace),168 (r'(\\)(\n)', bygroups(String.Escape, Whitespace)), # line continuation169 (r'/(\\\n)?/(\n|(.|\n)*?[^\\]\n)', Comment.Single),170 (r'/(\\\n)?[*](.|\n)*?[*](\\\n)?/', Comment.Multiline),171 (r'[{}#@]', Punctuation),172 (r'L?"', String, 'string'),173 (r"L?'(\\.|\\[0-7]{1,3}|\\x[a-fA-F0-9]{1,2}|[^\\\'\n])'", String.Char),174 175 (r'(\d+\.\d*|\.\d+|\d+)[eE][+-]?\d+[lL]?', Number.Float),176 (r'(\d+\.\d*|\.\d+|\d+[fF])[fF]?', Number.Float),177 178 (r'([1-9][_0-9]*)?\s*\'[sS]?[bB]\s*[xXzZ?01][_xXzZ?01]*',179 Number.Bin),180 (r'([1-9][_0-9]*)?\s*\'[sS]?[oO]\s*[xXzZ?0-7][_xXzZ?0-7]*',181 Number.Oct),182 (r'([1-9][_0-9]*)?\s*\'[sS]?[dD]\s*[xXzZ?0-9][_xXzZ?0-9]*',183 Number.Integer),184 (r'([1-9][_0-9]*)?\s*\'[sS]?[hH]\s*[xXzZ?0-9a-fA-F][_xXzZ?0-9a-fA-F]*',185 Number.Hex),186 187 (r'\'[01xXzZ]', Number),188 (r'[0-9][_0-9]*', Number.Integer),189 190 (r'[~!%^&*+=|?:<>/-]', Operator),191 (words(('inside', 'dist'), suffix=r'\b'), Operator.Word),192 193 (r'[()\[\],.;\'$]', Punctuation),194 (r'`[a-zA-Z_]\w*', Name.Constant),195 196 (words((197 'accept_on', 'alias', 'always', 'always_comb', 'always_ff',198 'always_latch', 'and', 'assert', 'assign', 'assume', 'automatic',199 'before', 'begin', 'bind', 'bins', 'binsof', 'break', 'buf',200 'bufif0', 'bufif1', 'case', 'casex', 'casez', 'cell',201 'checker', 'clocking', 'cmos', 'config',202 'constraint', 'context', 'continue', 'cover', 'covergroup',203 'coverpoint', 'cross', 'deassign', 'default', 'defparam', 'design',204 'disable', 'do', 'edge', 'else', 'end', 'endcase',205 'endchecker', 'endclocking', 'endconfig', 'endfunction',206 'endgenerate', 'endgroup', 'endinterface', 'endmodule', 'endpackage',207 'endprimitive', 'endprogram', 'endproperty', 'endsequence',208 'endspecify', 'endtable', 'endtask', 'enum', 'eventually',209 'expect', 'export', 'extern', 'final', 'first_match',210 'for', 'force', 'foreach', 'forever', 'fork', 'forkjoin', 'function',211 'generate', 'genvar', 'global', 'highz0', 'highz1', 'if', 'iff',212 'ifnone', 'ignore_bins', 'illegal_bins', 'implies', 'implements', 'import',213 'incdir', 'include', 'initial', 'inout', 'input',214 'instance', 'interconnect', 'interface', 'intersect', 'join',215 'join_any', 'join_none', 'large', 'let', 'liblist', 'library',216 'local', 'localparam', 'macromodule', 'matches',217 'medium', 'modport', 'module', 'nand', 'negedge', 'nettype', 'new', 'nexttime',218 'nmos', 'nor', 'noshowcancelled', 'not', 'notif0', 'notif1', 'null',219 'or', 'output', 'package', 'packed', 'parameter', 'pmos', 'posedge',220 'primitive', 'priority', 'program', 'property', 'protected', 'pull0',221 'pull1', 'pulldown', 'pullup', 'pulsestyle_ondetect',222 'pulsestyle_onevent', 'pure', 'rand', 'randc', 'randcase',223 'randsequence', 'rcmos', 'ref',224 'reject_on', 'release', 'repeat', 'restrict', 'return', 'rnmos',225 'rpmos', 'rtran', 'rtranif0', 'rtranif1', 's_always', 's_eventually',226 's_nexttime', 's_until', 's_until_with', 'scalared', 'sequence',227 'showcancelled', 'small', 'soft', 'solve',228 'specify', 'specparam', 'static', 'strong', 'strong0',229 'strong1', 'struct', 'super', 'sync_accept_on',230 'sync_reject_on', 'table', 'tagged', 'task', 'this', 'throughout',231 'timeprecision', 'timeunit', 'tran', 'tranif0', 'tranif1',232 'typedef', 'union', 'unique', 'unique0', 'until',233 'until_with', 'untyped', 'use', 'vectored',234 'virtual', 'wait', 'wait_order', 'weak', 'weak0',235 'weak1', 'while', 'wildcard', 'with', 'within',236 'xnor', 'xor'),237 suffix=r'\b'),238 Keyword),239 240 (r'(class)(\s+)([a-zA-Z_]\w*)',241 bygroups(Keyword.Declaration, Whitespace, Name.Class)),242 (r'(extends)(\s+)([a-zA-Z_]\w*)',243 bygroups(Keyword.Declaration, Whitespace, Name.Class)),244 (r'(endclass\b)(?:(\s*)(:)(\s*)([a-zA-Z_]\w*))?',245 bygroups(Keyword.Declaration, Whitespace, Punctuation, Whitespace, Name.Class)),246 247 (words((248 # Variable types249 'bit', 'byte', 'chandle', 'const', 'event', 'int', 'integer',250 'logic', 'longint', 'real', 'realtime', 'reg', 'shortint',251 'shortreal', 'signed', 'string', 'time', 'type', 'unsigned',252 'var', 'void',253 # Net types254 'supply0', 'supply1', 'tri', 'triand', 'trior', 'trireg',255 'tri0', 'tri1', 'uwire', 'wand', 'wire', 'wor'),256 suffix=r'\b'),257 Keyword.Type),258 259 (words((260 '`__FILE__', '`__LINE__', '`begin_keywords', '`celldefine',261 '`default_nettype', '`define', '`else', '`elsif', '`end_keywords',262 '`endcelldefine', '`endif', '`ifdef', '`ifndef', '`include',263 '`line', '`nounconnected_drive', '`pragma', '`resetall',264 '`timescale', '`unconnected_drive', '`undef', '`undefineall'),265 suffix=r'\b'),266 Comment.Preproc),267 268 (words((269 # Simulation control tasks (20.2)270 '$exit', '$finish', '$stop',271 # Simulation time functions (20.3)272 '$realtime', '$stime', '$time',273 # Timescale tasks (20.4)274 '$printtimescale', '$timeformat',275 # Conversion functions276 '$bitstoreal', '$bitstoshortreal', '$cast', '$itor',277 '$realtobits', '$rtoi', '$shortrealtobits', '$signed',278 '$unsigned',279 # Data query functions (20.6)280 '$bits', '$isunbounded', '$typename',281 # Array query functions (20.7)282 '$dimensions', '$high', '$increment', '$left', '$low', '$right',283 '$size', '$unpacked_dimensions',284 # Math functions (20.8)285 '$acos', '$acosh', '$asin', '$asinh', '$atan', '$atan2',286 '$atanh', '$ceil', '$clog2', '$cos', '$cosh', '$exp', '$floor',287 '$hypot', '$ln', '$log10', '$pow', '$sin', '$sinh', '$sqrt',288 '$tan', '$tanh',289 # Bit vector system functions (20.9)290 '$countbits', '$countones', '$isunknown', '$onehot', '$onehot0',291 # Severity tasks (20.10)292 '$info', '$error', '$fatal', '$warning',293 # Assertion control tasks (20.12)294 '$assertcontrol', '$assertfailoff', '$assertfailon',295 '$assertkill', '$assertnonvacuouson', '$assertoff', '$asserton',296 '$assertpassoff', '$assertpasson', '$assertvacuousoff',297 # Sampled value system functions (20.13)298 '$changed', '$changed_gclk', '$changing_gclk', '$falling_gclk',299 '$fell', '$fell_gclk', '$future_gclk', '$past', '$past_gclk',300 '$rising_gclk', '$rose', '$rose_gclk', '$sampled', '$stable',301 '$stable_gclk', '$steady_gclk',302 # Coverage control functions (20.14)303 '$coverage_control', '$coverage_get', '$coverage_get_max',304 '$coverage_merge', '$coverage_save', '$get_coverage',305 '$load_coverage_db', '$set_coverage_db_name',306 # Probabilistic distribution functions (20.15)307 '$dist_chi_square', '$dist_erlang', '$dist_exponential',308 '$dist_normal', '$dist_poisson', '$dist_t', '$dist_uniform',309 '$random',310 # Stochastic analysis tasks and functions (20.16)311 '$q_add', '$q_exam', '$q_full', '$q_initialize', '$q_remove',312 # PLA modeling tasks (20.17)313 '$async$and$array', '$async$and$plane', '$async$nand$array',314 '$async$nand$plane', '$async$nor$array', '$async$nor$plane',315 '$async$or$array', '$async$or$plane', '$sync$and$array',316 '$sync$and$plane', '$sync$nand$array', '$sync$nand$plane',317 '$sync$nor$array', '$sync$nor$plane', '$sync$or$array',318 '$sync$or$plane',319 # Miscellaneous tasks and functions (20.18)320 '$system',321 # Display tasks (21.2)322 '$display', '$displayb', '$displayh', '$displayo', '$monitor',323 '$monitorb', '$monitorh', '$monitoro', '$monitoroff',324 '$monitoron', '$strobe', '$strobeb', '$strobeh', '$strobeo',325 '$write', '$writeb', '$writeh', '$writeo',326 # File I/O tasks and functions (21.3)327 '$fclose', '$fdisplay', '$fdisplayb', '$fdisplayh',328 '$fdisplayo', '$feof', '$ferror', '$fflush', '$fgetc', '$fgets',329 '$fmonitor', '$fmonitorb', '$fmonitorh', '$fmonitoro', '$fopen',330 '$fread', '$fscanf', '$fseek', '$fstrobe', '$fstrobeb',331 '$fstrobeh', '$fstrobeo', '$ftell', '$fwrite', '$fwriteb',332 '$fwriteh', '$fwriteo', '$rewind', '$sformat', '$sformatf',333 '$sscanf', '$swrite', '$swriteb', '$swriteh', '$swriteo',334 '$ungetc',335 # Memory load tasks (21.4)336 '$readmemb', '$readmemh',337 # Memory dump tasks (21.5)338 '$writememb', '$writememh',339 # Command line input (21.6)340 '$test$plusargs', '$value$plusargs',341 # VCD tasks (21.7)342 '$dumpall', '$dumpfile', '$dumpflush', '$dumplimit', '$dumpoff',343 '$dumpon', '$dumpports', '$dumpportsall', '$dumpportsflush',344 '$dumpportslimit', '$dumpportsoff', '$dumpportson', '$dumpvars',345 ), suffix=r'\b'),346 Name.Builtin),347 348 (r'[a-zA-Z_]\w*:(?!:)', Name.Label),349 (r'\$?[a-zA-Z_]\w*', Name),350 (r'\\(\S+)', Name),351 ],352 'string': [353 (r'"', String, '#pop'),354 (r'\\([\\abfnrtv"\']|x[a-fA-F0-9]{2,4}|[0-7]{1,3})', String.Escape),355 (r'[^\\"\n]+', String), # all other characters356 (r'(\\)(\n)', bygroups(String.Escape, Whitespace)), # line continuation357 (r'\\', String), # stray backslash358 ],359 'macro': [360 (r'[^/\n]+', Comment.Preproc),361 (r'/[*](.|\n)*?[*]/', Comment.Multiline),362 (r'//.*?$', Comment.Single, '#pop'),363 (r'/', Comment.Preproc),364 (r'(?<=\\)\n', Comment.Preproc),365 (r'\n', Whitespace, '#pop'),366 ],367 'import': [368 (r'[\w:]+\*?', Name.Namespace, '#pop')369 ]370 }371 372 373class VhdlLexer(RegexLexer):374 """375 For VHDL source code.376 """377 name = 'vhdl'378 aliases = ['vhdl']379 filenames = ['*.vhdl', '*.vhd']380 mimetypes = ['text/x-vhdl']381 url = 'https://en.wikipedia.org/wiki/VHDL'382 version_added = '1.5'383 flags = re.MULTILINE | re.IGNORECASE384 385 tokens = {386 'root': [387 (r'\s+', Whitespace),388 (r'(\\)(\n)', bygroups(String.Escape, Whitespace)), # line continuation389 (r'--.*?$', Comment.Single),390 (r'/(\\\n)?[*](.|\n)*?[*](\\\n)?/', Comment.Multiline),391 (r"'(U|X|0|1|Z|W|L|H|-)'", String.Char),392 (r'[~!%^&*+=|?:<>/-]', Operator),393 (r"'[a-z_]\w*", Name.Attribute),394 (r'[()\[\],.;\']', Punctuation),395 (r'"[^\n\\"]*"', String),396 397 (r'(library)(\s+)([a-z_]\w*)',398 bygroups(Keyword, Whitespace, Name.Namespace)),399 (r'(use)(\s+)(entity)', bygroups(Keyword, Whitespace, Keyword)),400 (r'(use)(\s+)([a-z_][\w.]*\.)(all)',401 bygroups(Keyword, Whitespace, Name.Namespace, Keyword)),402 (r'(use)(\s+)([a-z_][\w.]*)',403 bygroups(Keyword, Whitespace, Name.Namespace)),404 (r'(std|ieee)(\.[a-z_]\w*)',405 bygroups(Name.Namespace, Name.Namespace)),406 (words(('std', 'ieee', 'work'), suffix=r'\b'),407 Name.Namespace),408 (r'(entity|component)(\s+)([a-z_]\w*)',409 bygroups(Keyword, Whitespace, Name.Class)),410 (r'(architecture|configuration)(\s+)([a-z_]\w*)(\s+)'411 r'(of)(\s+)([a-z_]\w*)(\s+)(is)',412 bygroups(Keyword, Whitespace, Name.Class, Whitespace, Keyword, Whitespace,413 Name.Class, Whitespace, Keyword)),414 (r'([a-z_]\w*)(:)(\s+)(process|for)',415 bygroups(Name.Class, Operator, Whitespace, Keyword)),416 (r'(end)(\s+)', bygroups(using(this), Whitespace), 'endblock'),417 418 include('types'),419 include('keywords'),420 include('numbers'),421 422 (r'[a-z_]\w*', Name),423 ],424 'endblock': [425 include('keywords'),426 (r'[a-z_]\w*', Name.Class),427 (r'\s+', Whitespace),428 (r';', Punctuation, '#pop'),429 ],430 'types': [431 (words((432 'boolean', 'bit', 'character', 'severity_level', 'integer', 'time',433 'delay_length', 'natural', 'positive', 'string', 'bit_vector',434 'file_open_kind', 'file_open_status', 'std_ulogic', 'std_ulogic_vector',435 'std_logic', 'std_logic_vector', 'signed', 'unsigned'), suffix=r'\b'),436 Keyword.Type),437 ],438 'keywords': [439 (words((440 'abs', 'access', 'after', 'alias', 'all', 'and',441 'architecture', 'array', 'assert', 'attribute', 'begin', 'block',442 'body', 'buffer', 'bus', 'case', 'component', 'configuration',443 'constant', 'disconnect', 'downto', 'else', 'elsif', 'end',444 'entity', 'exit', 'file', 'for', 'function', 'generate',445 'generic', 'group', 'guarded', 'if', 'impure', 'in',446 'inertial', 'inout', 'is', 'label', 'library', 'linkage',447 'literal', 'loop', 'map', 'mod', 'nand', 'new',448 'next', 'nor', 'not', 'null', 'of', 'on',449 'open', 'or', 'others', 'out', 'package', 'port',450 'postponed', 'procedure', 'process', 'pure', 'range', 'record',451 'register', 'reject', 'rem', 'return', 'rol', 'ror', 'select',452 'severity', 'signal', 'shared', 'sla', 'sll', 'sra',453 'srl', 'subtype', 'then', 'to', 'transport', 'type',454 'units', 'until', 'use', 'variable', 'wait', 'when',455 'while', 'with', 'xnor', 'xor'), suffix=r'\b'),456 Keyword),457 ],458 'numbers': [459 (r'\d{1,2}#[0-9a-f_]+#?', Number.Integer),460 (r'\d+', Number.Integer),461 (r'(\d+\.\d*|\.\d+|\d+)E[+-]?\d+', Number.Float),462 (r'X"[0-9a-f_]+"', Number.Hex),463 (r'O"[0-7_]+"', Number.Oct),464 (r'B"[01_]+"', Number.Bin),465 ],466 }467